
VFD-S Series
DELTA ELECTRONICS, INC. ALL RIGHTS RESERVED
5-18
The timing diagram is shown below:
Preliminary Counter Value Attained Output
(Pr. 3-04=d3)
(Pr. 3-05 to Pr. 3-06=d15)
Terminal Count Value Attained Output
(Pr.3-03=d5)
(Pr.3-05 to Pr.3-06=d14)
Display
(Pr.0-04=d1)
TRG
Counter Trigger Signal
Multi-function Input Terminal
The width of trigger signal
should not be less than
2ms(<250 Hz)
2ms
2ms
3 - 05 Multi-function Output Terminal 1
(Photocoupler output)
Factory Setting: d 1
3 - 06 Multi-function Output Terminal 2 (relay output) Factory Setting: d 8
Settings d 0 to d 18
Function Table List:
Setting Function Setting Function
d 0 Not used d 10 PLC Program Running
d 1 AC Drive Operational d 11 PLC Program Step Completed
d 2 Maximum Output Frequency Attained d 12 PLC Program Completed
d 3 Zero speed d 13 PLC Operation Paused
d 4 Over-Torque detection d 14 Terminal Count Value Attained
d 5 Base-Block (B.B.) Indication d 15 Preliminary Counter Value Attained
d 6 Low-Voltage Indication d 16 Ready State Indicator
d 7 AC Drive Operation Mode d 17 FWD command indication
d 8 Fault indication d 18 REV command indication
d 9 Desired Frequency Attained
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